LCMXO2-1200HC-4TG144I IC FPGA 107 I/O 144TQFP

Kev piav qhia

MachXO2 tsev neeg ntawm lub hwj chim qis qis, instant-on, tsis-volatile PLDs muaj rau cov khoom siv nrog qhov ntom ntom ntawm 256 txog 6864 Look-Up Tables (LUTs).Ntxiv rau LUT-raws li, tus nqi qis programmable logic cov cuab yeej no feature Embedded Block RAM (EBR), Distributed RAM, User Flash Memory (UFM), Phase Locked Loops (PLLs), preengineered source synchronous I / O kev txhawb nqa, kev txhawb nqa siab heev suav nrog dual-boot muaj peev xwm thiab hardened versions ntawm feem ntau siv zog xws li SPI maub los, I2 C maub los thiab timer/counter.Cov yam ntxwv no tso cai rau cov khoom siv no siv rau hauv cov nqi qis, cov neeg siv khoom siv siab thiab kev siv lub cev.Cov khoom siv MachXO2 yog tsim los ntawm 65 nm uas tsis yog-volatile low power process.Cov cuab yeej cuab tam muaj ntau yam xws li programmable low swing differential I/Os thiab muaj peev xwm tua I/O cov tsev txhab nyiaj, on-chip PLLs thiab oscillators dynamically.Cov yam ntxwv no pab tswj kev siv hluav taws xob zoo li qub thiab tsis muaj zog uas ua rau muaj lub zog zoo li qub rau txhua tus neeg hauv tsev neeg.Cov khoom siv MachXO2 muaj nyob rau hauv ob hom - ultra low power (ZE) thiab kev ua haujlwm siab (HC thiab HE).Cov khoom siv hluav taws xob tsis tshua muaj hluav taws xob muaj nyob hauv peb qib ceev -1, -2 thiab -3, nrog -3 yog qhov ceev tshaj plaws.Ib yam li ntawd, cov cuab yeej ua tau zoo muaj nyob rau hauv peb qib ceev: -4, -5 thiab -6, nrog -6 yog qhov ceev tshaj plaws.HC cov cuab yeej muaj lub tshuab hluav taws xob sab hauv uas txhawb nqa VCC cov khoom siv hluav taws xob sab nraud ntawm 3.3 V lossis 2.5 V. ZE thiab HE cov khoom siv tsuas yog lees txais 1.2 V raws li cov khoom siv hluav taws xob sab nraud VCC.Nrog rau qhov tshwj xeeb ntawm lub zog hluav taws xob hluav taws xob tag nrho peb hom khoom siv (ZE, HC thiab HE) yog qhov ua haujlwm tau zoo thiab tus pin sib haum nrog ib leeg.MachXO2 PLDs muaj nyob rau hauv ntau yam ntawm cov pob khoom tsis muaj halogen siab heev xws li qhov chaw txuag 2.5 hli x 2.5 hli WLCSP mus rau 23 hli x 23 hli fpBGA.MachXO2 li pab txhawb kev tsiv teb tsaws chaw nyob hauv tib lub pob.Table 1-1 qhia txog LUT qhov ntom ntom, pob thiab I / O xaiv, nrog rau lwm qhov tseem ceeb.Lub tshuab ua ntej ua haujlwm synchronous logic siv nyob rau hauv MachXO2 ntaus ntawv tsev neeg txhawb nqa ntau yam ntawm cov qauv kev sib txuas, suav nrog LPDDR, DDR, DDR2 thiab 7: 1 gearing rau zaub I/Os.